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an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. opa2333p sbos908 ? november 2017 opa2333p 1.8-v, micro power, cmos operational amplifier, zero-drift 1 1 features 1 ? low offset voltage: 10 v (maximum) ? zero drift: 0.05 v/ c (maximum) ? 0.01-hz to 10-hz noise: 1.1 v pp ? quiescent current: 17 a ? single-supply operation ? supply voltage: 1.8 v to 5.5 v ? rail-to-rail input/output ? specified start-up time: 500 s (maximum) ? micro size package: 2-mm 2-mm wson 2 applications ? smartphones ? wearables ? fitness and healthcare products ? electronic scales ? medical instrumentation ? battery-powered instruments ? handheld test equipment 3 description the opa2333p is a cmos operational amplifier that uses a proprietary auto-calibration technique to simultaneously provide very low offset voltage (10 v, maximum) and near-zero drift over time and temperature. this miniature, high-precision, low quiescent current amplifier offers high-impedance inputs that have a common-mode range 100 mv beyond the rails, and rail-to-rail output that swings within 50 mv of the rails. single or dual supplies as low as 1.8 v ( 0.9 v) and up to 5.5 v ( 2.75 v) can be used. this device is optimized for low-voltage, single-supply operation. the opa2333p offers excellent cmrr without the crossover associated with traditional complementary input stages. this design results in superior performance for driving analog-to-digital converters (adcs) without degradation of differential linearity. the opa2333p is available in a 2-mm 2-mm 8-pin wson package and is specified for operation from ? 40 c to 125 c. device information (1) part number package body size (nom) opa2333p wson (8) 2.00 mm 2.00 mm (1) for all available packages, see the orderable addendum at the end of the data sheet. bidirectional, low-side current shunt amplifier 0.1-hz to 10-hz noise 500 nv/div 1 s/div C + + i load r shunt v bus C + v out v cc r l r 1 r 2 r 4 r 3 r 5 r 6 v cc v cc copyright ? 2016, texas instruments incorporated tools & software technical documents ordernow productfolder support &community
2 opa2333p sbos908 ? november 2017 www.ti.com product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated table of contents 1 features .................................................................. 1 2 applications ........................................................... 1 3 description ............................................................. 1 4 revision history ..................................................... 2 5 pin configuration and functions ......................... 3 6 specifications ......................................................... 4 6.1 absolute maximum ratings ...................................... 4 6.2 esd ratings .............................................................. 4 6.3 recommended operating conditions ....................... 4 6.4 thermal information: opa2333p .............................. 4 6.5 electrical characteristics ........................................... 5 6.6 typical characteristics .............................................. 7 7 detailed description ............................................ 11 7.1 overview ................................................................. 11 7.2 functional block diagram ....................................... 11 7.3 feature description ................................................. 11 7.4 device functional modes ........................................ 14 8 application and implementation ........................ 15 8.1 application information ............................................ 15 8.2 typical application .................................................. 15 9 power supply recommendations ...................... 20 10 layout ................................................................... 21 10.1 layout guidelines ................................................. 21 10.2 layout example .................................................... 21 11 device and documentation support ................. 22 11.1 device support ...................................................... 22 11.2 documentation support ........................................ 22 11.3 receiving notification of documentation updates 22 11.4 community resources .......................................... 22 11.5 trademarks ........................................................... 22 11.6 electrostatic discharge caution ............................ 22 11.7 glossary ................................................................ 22 12 mechanical, packaging, and orderable information ........................................................... 23 4 revision history note: page numbers for previous revisions may differ from page numbers in the current version. date revision notes november 2017 * initial release
3 opa2333p www.ti.com sbos908 ? november 2017 product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated 5 pin configuration and functions dfn package 8-pin wson with exposed thermal pad top view pin functions pin i/o description name no. +in a 3 i noninverting input, channel a +in b 5 i noninverting input, channel b ? in a 2 i inverting input, channel a ? in b 6 i inverting input, channel b out a 1 o output, channel a out b 7 o output, channel b v+ 8 ? positive (highest) power supply v ? 4 ? negative (lowest) power supply thermal pad ? ? thermal pad, connect to v ? 8 v+ 7 6 in b 5 +in b not to scale thermal pad out b 2 in a 3 +in a 1 out a 4 v
4 opa2333p sbos908 ? november 2017 www.ti.com product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated (1) stresses beyond those listed under absolute maximum rating may cause permanent damage to the device. these are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) input terminals are anti-parallel diode-clamped to each other. input signals that can cause differential voltages of swing more than 0.5 v must be current-limited to 10 ma or less. (3) input terminals are diode-clamped to the power-supply rails. input signals that can swing more than 0.5 v beyond the supply rails should be current-limited to 10 ma or less. (4) short-circuit to ground, one amplifier per package. 6 specifications 6.1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) (1) min max unit supply voltage, v s = (v+) - (v-) single-supply 7 v dual-supply 3.5 signal input pins voltage common-mode (2) (v ? ) ? 0.3 (v+) + 0.3 differential (2) 0.5 current (3) 1 ma output short current (4) continuous temperature operating, t a ? 40 150 c junction, t j 150 storage, t stg ? 65 150 (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 6.2 esd ratings value unit v (esd) electrostatic discharge human body model (hbm), per ansi/esda/jedec js-001, all pins (1) 4000 v charged device model (cdm), per jedec specification jesd22-c101, all pins (2) 1000 6.3 recommended operating conditions over operating free-air temperature range (unless otherwise noted) min nom max unit v s supply voltage, [ (v+) - (v-) ] single supply 1.8 5.5 v dual supply 0.9 2.75 specified temperature ? 40 125 c (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.4 thermal information: opa2333p thermal metric (1) opa2333p unit dsg (wson) 8 pins r ja junction-to-ambient thermal resistance 74.5 c/w r jc(top) junction-to-case (top) thermal resistance 93.5 c/w r jb junction-to-board thermal resistance 41.1 c/w jt junction-to-top characterization parameter 4.3 c/w jb junction-to-board characterization parameter 41.2 c/w r jc(bot) junction-to-case (bottom) thermal resistance 15.7 c/w
5 opa2333p www.ti.com sbos908 ? november 2017 product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated 6.5 electrical characteristics over operating free-air temperature range (unless otherwise noted) parameter test conditions min typ max unit offset voltage v os input offset voltage v s = 5 v 2 v v s = 5 v t a = ? 40 c to +125 c 10 v dv os /dt input offset voltage drift v s = 5 v t a = ? 40 c to +125 c 0.05 v/ c psrr power-supply rejection ratio 1.8 v v s 5.5 v t a = ? 40 c to +125 c 1 5 v/v channel separation, dc 0.1 v/v input bias current i b input bias current t a = 25 c 70 200 pa t a = ? 40 c to +125 c 150 400 pa i os input offset current 140 400 pa noise e n input voltage noise f = 0.1 hz to 10 hz, peak-to-peak 1.1 v pp f = 0.1 hz to 10 hz, rms 0.2 v rms e n input voltage noise density f = 10 hz 55 nv/ hz f = 1 khz 55 nv/ hz i n input current noise density f = 100 hz 100 fa/ hz input voltage v cm common-mode voltage range (v ? ) ? 0.1 (v+) + 0.1 v cmrr common-mode rejection ratio (v ? ) ? 0.1 v v cm (v+) + 0.1 v t a = ? 40 c to +125 c 106 130 db input impedance z id differential 10 13 || 2 || pf z icm common-mode 10 13 || 4 || pf open-loop gain a ol open-loop voltage gain t a = ? 40 c to +125 c (v ? ) + 100 mv v o (v+) ? 100 mv, r l = 10 k 106 130 db (v ? ) + 100 mv v o (v+) ? 100 mv, r l = 2 k 130 db
6 opa2333p sbos908 ? november 2017 www.ti.com product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated electrical characteristics (continued) over operating free-air temperature range (unless otherwise noted) parameter test conditions min typ max unit frequency response m phase margin v o = 10 mv pp , c l = 100 pf 65 degrees gbw gain-bandwidth product v o = 10 mv pp , c l = 100 pf 350 khz sr slew rate v o = 4-v step g = 1 0.16 v/ s output output voltage swing r l = 10 k 30 50 mv r l = 2 k 50 100 mv t a = ? 40 c to +125 c r l = 10 k 70 mv r l = 2 k 150 mv i sc short-circuit current 5 ma c l capactive load drive see typical characteristics z o open-loop output impedance f = 350 khz, i o = 0 ma 2 k turnon time v s = 5 v 100 500 s power supply v s specified voltage 1.8 5.5 v i q quiescent current (per amplifier) i o = 0 a 17 25 a t a = ? 40 c to +125 c 28 temperature range t a specified range ? 40 125 c t a operating range ? 55 150 c
7 opa2333p www.ti.com sbos908 ? november 2017 product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated 6.6 typical characteristics table 1. list of typical characteristics title figure offset voltage production distribution figure 1 offset voltage drift production distribution figure 2 open-loop gain vs frequency figure 3 common-mode rejection ratio vs frequency figure 4 power-supply rejection ratio vs frequency figure 5 output voltage swing vs output current figure 6 input bias current vs common-mode voltage figure 7 input bias current vs temperature figure 8 quiescent current vs temperature figure 9 large-signal step response figure 10 small-signal step response figure 11 positive overvoltage recovery figure 12 negative overvoltage recovery figure 13 settling time vs closed-loop gain figure 14 small-signal overshoot vs load capacitance figure 15 0.1-hz to 10-hz noise figure 16 current and voltage noise spectral density vs frequency figure 17 at t a = 25 c, v s = 5 v, and c l = 0 pf, unless otherwise noted. figure 1. offset voltage production distribution figure 2. offset voltage drift production distribution population 0 0.0025 0.0050 0.0075 0.0100 0.0125 0.0150 0.0175 0.0200 0.0225 0.0250 0.0275 0.0300 0.0325 0.0350 0.0375 0.0400 0.0425 0.0450 0.0475 0.0500 offset voltage drift ( v/ c) m population - 10 - 9 - 8 - 7 - 6 - 5 - 4 - 3 - 2 - 1 0 1 2 3 4 5 6 7 8 9 10 offset voltage ( v) m
8 opa2333p sbos908 ? november 2017 www.ti.com product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated at t a = 25 c, v s = 5 v, and c l = 0 pf, unless otherwise noted. figure 3. open-loop gain and phase vs frequency figure 4. common-mode rejection ratio vs frequency figure 5. power-supply rejection ratio vs frequency figure 6. output voltage swing vs output current figure 7. input bias current vs common-mode voltage figure 8. input bias current vs temperature a (db) ol 10 120100 8060 40 20 0 -20 phase () 250200 150 100 50 0 -50 -100 100k 10k 1k 100 frequency (hz) 1m phase gain cmrr (db) 1 140120 100 8060 40 20 0 100k 10k 1k 100 10 frequency (hz) 1m output swing (v) 0 32 1 0 - 1 - 2 - 3 1 output current (ma) 10 7 8 9 6 5 4 3 2 - 40 c - 40 c - 40 c +25 c +25 c +25 c +125 c +125 c v = 2.75 v s v = 0.9 v s psrr (db) 1 120100 8060 40 20 0 10k 100k 1k 100 10 frequency (hz) 1m +psrr - psrr i (pa) b - 50 200150 100 50 0 - 50 - 100 - 150 - 200 - 25 temperature ( c) 125 100 75 50 25 0 v = 5.5 v s v = 1.8 v s - i b - i b +i b +i b i (pa) b 0 100 8060 40 20 0 - 20 - 40 - 60 - 80 - 100 1 common-mode voltage (v) 5 4 3 2 - i b +i b
9 opa2333p www.ti.com sbos908 ? november 2017 product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated at t a = 25 c, v s = 5 v, and c l = 0 pf, unless otherwise noted. figure 9. quiescent current vs temperature figure 10. large-signal step response figure 11. small-signal step response figure 12. positive overvoltage recovery figure 13. negative overvoltage recovery figure 14. settling time vs closed-loop gain i ( a) m q - 50 2520 15 10 50 - 25 temperature ( c) 125 100 75 50 25 0 v = 1.8 v s v = 5.5 v s output voltage (1 v/div) time (50 s/div) m g = 1 r = 10 k w l output voltage (50 mv/div) time (5 s/div) m g = +1 r = 10 k w l 2 v/div 0 1 v/div 0 input output 10 k w 1 k w opa333 +2.5 v - 2.5 v time (50 s/div) m 2 v/div 0 1 v/div 0 time (50 s/div) m input output 10 k w 1 k w opa333 +2.5 v - 2.5 v settling time ( s) m 1 600500 400 300 200 100 0 10 gain (db) 100 0.001% 0.01% 4-v step
10 opa2333p sbos908 ? november 2017 www.ti.com product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated at t a = 25 c, v s = 5 v, and c l = 0 pf, unless otherwise noted. figure 15. small-signal overshoot vs load capacitance figure 16. 0.1-hz to 10-hz noise figure 17. current and voltage noise spectral density vs frequency voltage noise (nv/ ) ? hz 1 1000 100 10 current noise (fa/ ) ? hz 1000100 10 1k 100 10 frequency (hz) 10k current noise voltage noise continues with no 1/f (flicker) noise. 500nv/div 1s/div overshoot (%) 10 4035 30 25 20 15 10 50 100 load capacitance (pf) 1000
11 opa2333p www.ti.com sbos908 ? november 2017 product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated 7 detailed description 7.1 overview the opa2333p is a zero-drift, low-power, rail-to-rail input and output operational amplifier. the device operates from 1.8 v to 5.5 v, is unity-gain stable, and is suitable for a wide range of general-purpose applications. the zero-drift architecture provides ultra-low offset voltage and near-zero offset voltage drift. 7.2 functional block diagram 7.3 feature description the opa2333p is unity-gain stable and free from unexpected output phase reversal. this device uses a proprietary auto-calibration technique to provide low offset voltage and very low drift over time and temperature. for lowest offset voltage and precision performance, optimize circuit layout and mechanical conditions. avoid temperature gradients that create thermoelectric (seebeck) effects in the thermocouple junctions formed from connecting dissimilar conductors. cancel these thermally-generated potentials by assuring they are equal on both input terminals. other layout and design considerations include: ? use low thermoelectric-coefficient conditions (avoid dissimilar metals). ? thermally isolate components from power supplies or other heat sources. ? shield operational amplifier and input circuitry from air currents, such as cooling fans. following these guidelines reduces the likelihood of junctions being at different temperatures, which can cause thermoelectric voltages of 0.1 v/ c or higher, depending on materials used. 7.3.1 operating voltage the opa2333p operational amplifier operates over a power-supply range of 1.8 v to 5.5 v ( 0.9 v to 2.75 v). parameters that vary over supply voltage or temperature are shown in the typical characteristics section. caution supply voltages higher than +7 v (absolute maximum) can permanently damage the device. 7.3.2 input voltage the opa2333p input common-mode voltage range extends 0.1 v beyond the supply rails. the opa2333p is designed to cover the full range without the troublesome transition region found in some other rail-to-rail amplifiers. +in in chop1 chop2 notch filter gm2 gm3 out gm_ff gm1 c1 c2 copyright ? 2016, texas instruments incorporated
12 opa2333p sbos908 ? november 2017 www.ti.com product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated feature description (continued) typically, input bias current is approximately 70 pa; however, input voltages that exceed the power supplies can cause excessive current to flow into or out of the input pins. momentary voltages greater than the power supply can be tolerated if the input current is limited to 10 ma. this limitation is easily accomplished with an input resistor, as shown in figure 18 . figure 18. input current protection 7.3.3 internal offset correction the opa2333p operational amplifier uses an auto-calibration technique with a time-continuous 350-khz operational amplifier in the signal path. this amplifier is zero-corrected every 8 s using a proprietary technique. upon power up, the amplifier requires approximately 100 s to achieve specified v os accuracy. this design has no aliasing or flicker noise. 7.3.4 achieving output swing to the op amp negative rail some applications require output voltage swings from 0 v to a positive full-scale voltage (such as 2.5 v) with excellent accuracy. with most single-supply operational amplifiers, problems arise when the output signal approaches 0 v, near the lower output swing limit of a single-supply operational amplifier. a good, single-supply operational amplifier may swing close to single-supply ground, but does not reach ground. the output of the opa2333p can be made to swing to, or slightly below, ground on a single-supply power source. this swing is achieved with the use of the use of another resistor and an additional, more negative power supply than the operational amplifier negative supply. a pulldown resistor can be connected between the output and the additional negative supply to pull the output down below the value that the output would otherwise achieve, as shown in figure 19 . figure 19. v out range to ground v out r = 20 k p w op amp v = gnd - v in v+ = +5 v - 5 v additional negative supply 5 k w 10 ma max +5 v v in v out i overload current-limiting resistor required if input voltage exceeds supply rails by3 0.5 v.
13 opa2333p www.ti.com sbos908 ? november 2017 product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated feature description (continued) the opa2333p has an output stage that allows the output voltage to be pulled to the negative supply rail, or slightly below, using the technique previously described. this technique only works with some types of output stages. the opa2333p is characterized to perform with this technique; the recommended resistor value is approximately 20 k ? . note this configuration increases the current consumption by several hundreds of microamps. accuracy is excellent down to 0 v and as low as ? 2 mv. limiting and nonlinearity occur below ? 2 mv, but excellent accuracy returns after the output is again driven above ? 2 mv. lowering the resistance of the pulldown resistor allows the operational amplifier to swing even further below the negative rail. resistances as low as 10 k ? can be used to achieve excellent accuracy down to ? 10 mv. 7.3.5 specified start-up performance the opa2333p has a dedicated start-up circuit that ensures a fast, repeatable startup for all supply conditions. the opa2333p is specified to have a maximum start-up time that is production-tested as illustrated in the configuration shown in figure 20 . start-up time is defined as the time from when the power supply reaches the minimum specified voltage to the time the output has settled to within 20 mv of the nominal value. see figure 21 . figure 20. opa2333p equivalent start-up test configuration figure 21. opa2333p start-up timing 7.3.6 dfn package the opa2333p is offered in an dfn-8 package (also known as son ). the dfn is a qfn package with lead contacts on only two sides of the bottom of the package. this leadless package maximizes board space and enhances thermal and electrical characteristics through an exposed pad. dfn packages are physically small, have a smaller routing area, improved thermal performance, and improved electrical parasitics. additionally, the absence of external leads eliminates bent-lead issues. start-up time time supply voltage 1.8 v 3.3 v +20 mv -20 mv voltage output voltage + 10 k output v+ v- 10 k
14 opa2333p sbos908 ? november 2017 www.ti.com product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated feature description (continued) the dfn package can be easily mounted using standard pcb assembly techniques. see application reports qfn/son pcb attachment and quad flatpack no-lead logic packages , both available for download at www.ti.com . note the exposed leadframe die pad on the bottom of the package should be connected to v ? or left unconnected. 7.4 device functional modes the opa2333p device has a single functional mode. the device is powered on as long as the power supply voltage is between 1.8 v ( 0.9 v) and 5.5 v ( 2.75 v).
15 opa2333p www.ti.com sbos908 ? november 2017 product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated 8 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 8.1 application information the opa2333p is a unity-gain stable, precision operational amplifier with very low offset voltage drift; these devices are also free from output phase reversal. applications with noisy or high-impedance power supplies require decoupling capacitors close to the device power-supply pins. in most cases, 0.1- f capacitors are adequate. 8.2 typical application 8.2.1 bidirectional current-sensing this single-supply, low-side, bidirectional current-sensing solution detects load currents from ? 1 a to 1 a. the single-ended output spans from 110 mv to 3.19 v. this design uses the opa2333p because of its low offset voltage and rail-to-rail input and output. one of the amplifiers is configured as a difference amplifier and the other provides the reference voltage. figure 22 shows the solution. figure 22. bidirectional current-sensing schematic + + i load r shunt v bus + v out v cc r l r 1 r 2 r 4 r 3 r 5 r 6 v cc v ref + v shunt v cc u1a u1b copyright ? 2016, texas instruments incorporated
16 opa2333p sbos908 ? november 2017 www.ti.com product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated typical application (continued) 8.2.1.1 design requirements this solution has the following requirements: ? supply voltage: 3.3 v ? input: ? 1 a to 1 a ? output: 1.65 v 1.54 v (110 mv to 3.19 v) 8.2.1.2 detailed design procedure the load current, i load , flows through the shunt resistor (r shunt ) to develop the shunt voltage, v shunt . the shunt voltage is then amplified by the difference amplifier, which consists of u1a and r 1 through r 4 . the gain of the difference amplifier is set by the ratio of r 4 to r 3 . to minimize errors, set r 2 = r 4 and r 1 = r 3 . the reference voltage, v ref , is supplied by buffering a resistor divider using u1b. the transfer function is given by equation 1 . where ? ? ? (1) there are two types of errors in this design: offset and gain. gain errors are introduced by the tolerance of the shunt resistor and the ratios of r 4 to r 3 and, similarly, r 2 to r 1 . offset errors are introduced by the voltage divider (r 5 and r 6 ) and how closely the ratio of r 4 /r 3 matches r 2 /r 1 . the latter value impacts the cmrr of the difference amplifier, which ultimately translates to an offset error. because this is a low-side measurement, the value of v shunt is the ground potential for the system load. therefore, it is important to place a maximum value on v shunt . in this design, the maximum value for v shunt is set to 100 mv. equation 2 calculates the maximum value of the shunt resistor given a maximum shunt voltage of 100 mv and maximum load current of 1 a. (2) the tolerance of r shunt is directly proportional to cost. for this design, a shunt resistor with a tolerance of 0.5% was selected. if greater accuracy is required, select a 0.1% resistor or better. the load current is bidirectional; therefore, the shunt voltage range is ? 100 mv to 100 mv. this voltage is divided down by r 1 and r 2 before reaching the operational amplifier, u1a. take care to ensure that the voltage present at the noninverting node of u1a is within the common-mode range of the device. therefore, it is important to use an operational amplifier, such as the opa2333p, that has a common-mode range that extends below the negative supply voltage. finally, to minimize offset error, note that the opa2333p has a typical offset voltage of 2 v ( 10 v maximum). given a symmetric load current of ? 1 a to 1 a, the voltage divider resistors (r 5 and r 6 ) must be equal. to be consistent with the shunt resistor, a tolerance of 0.5% was selected. to minimize power consumption, 10-k resistors were used. to set the gain of the difference amplifier, the common-mode range and output swing of the opa2333p must be considered. equation 3 and equation 4 depict the typical common-mode range and maximum output swing, respectively, of the opa2333p given a 3.3-v supply. ? 100 mv < v cm < 3.4 v (3) 100 mv < v out < 3.2 v (4) the gain of the difference amplifier can now be calculated as shown in equation 5 . (5) v = v gain + v out shunt diff_amp ref gain = diff_amp vv = 15.5 v v r (i i ) out_max out_min shunt max min - - 3.2 v 100 mv 100 m - w - - [1 a ( 1a)] = v = i r shunt load shunt gain = diff_amp rr 43 v = v ref cc r r r 6 5 6 + r = shunt(max) = = 100 m w v i shunt(max) load(max) 100 mv 1 a
17 opa2333p www.ti.com sbos908 ? november 2017 product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated typical application (continued) the resistor value selected for r 1 and r 3 was 1 k . 15.4 k was selected for r 2 and r 4 because it is the nearest standard value. therefore, the ideal gain of the difference amplifier is 15.4 v/v. the gain error of the circuit primarily depends on r 1 through r 4 . as a result of this dependence, 0.1% resistors were selected. this configuration reduces the likelihood that the design requires a two-point calibration. a simple one-point calibration, if desired, removes the offset errors introduced by the 0.5% resistors. 8.2.1.3 application curve figure 23. bidirectional current-sensing circuit performance: output voltage vs input current 8.2.2 high-side voltage-to-current (v-i) converter the circuit shown in figure 24 is a high-side voltage-to-current (v-i) converter. it translates in input voltage of 0 v to 2 v to and output current of 0 ma to 100 ma. figure 25 shows the measured transfer function for this circuit. the low offset voltage and offset drift of the opa2333p facilitate excellent dc accuracy for the circuit. figure 24. high-side voltage-to-current (v-i) converter v+ i load a1 a2 q1 q2 + + + v in r load r s1 r s2 r s3 i rs1 i rs2 i rs3 v rs2 v rs3 v rs1 v load v+ c 6 c 7 r 3 r 5 r 4 r 2 470 4.7 2200 pf 330 10 k 200 1000 pf 10 k 2 k copyright ? 2016, texas instruments incorporated 1.65 - 1.0 - 0.5 0 0.5 1.0 0 3.30 input current (a) output voltage (v)
18 opa2333p sbos908 ? november 2017 www.ti.com product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated typical application (continued) 8.2.2.1 design requirements the design requirements are as follows: ? supply voltage: 5 v dc ? input: 0 v to 2 v dc ? output: 0 ma to 100 ma dc 8.2.2.2 detailed design procedure the v-i transfer function of the circuit is based on the relationship between the input voltage, v in , and the three current sensing resistors, r s1 , r s2 , and r s3 . the relationship between v in and r s1 determines the current that flows through the first stage of the design. the current gain from the first stage to the second stage is based on the relationship between r s2 and r s3 . for a successful design, pay close attention to the dc characteristics of the operational amplifier chosen for the application. to meet the performance goals, this application benefits from an operational amplifier with low offset voltage, low temperature drift, and rail-to-rail output. the opa2333p cmos operational amplifier is a high- precision, 2-uv offset, 0.02- v/ c drift amplifier optimized for low-voltage, single-supply operation with an output swing to within 50 mv of the positive rail. the opa2333p family uses chopping techniques to provide low initial offset voltage and near-zero drift over time and temperature. low offset voltage and low drift reduce the offset error in the system, making these devices appropriate for precise dc control. the rail-to-rail output stage of the opa2333p ensures that the output swing of the operational amplifier is able to fully control the gate of the mosfet devices within the supply rails. a detailed error analysis, design procedure, and additional measured results are given in tipd102 . 8.2.2.3 application curve figure 25. measured transfer function for high-side v-i converter input voltage (v) output current (a) 0 0.5 1 1.5 0 0.025 0.05 0.1 load 0.075 2 d001
19 opa2333p www.ti.com sbos908 ? november 2017 product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated typical application (continued) 8.2.3 other applications additional application ideas are shown in figure 26 through figure 28 . (1) zener rated for op amp supply capability (that is, 5.1 v for opa2333p). (2) current-limiting resistor. (3) choose zener biasing resistor or dual n-mosfets (fdg6301n, ntjd4001n, or si1034). figure 26. high-side current monitor figure 27. precision instrumentation amplifier output r shunt load v+ v+ r g r l r (2) 1 10 k w r bias +5v zener (1) two zener biasing methods are shown. (3) mosfet rated to stand-off supply voltage such as bss84 for up to 50 v. v 1 - in v 2 +in r 1 r 2 23 56 1 r 2 ina152 v o v = (1 + 2r / r ) (v v ) o 2 1 2 1 - opa2333 opa2333
20 opa2333p sbos908 ? november 2017 www.ti.com product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated typical application (continued) (1) other instrumentation amplifiers can be used, such as the ina326 , which has lower noise, but higher quiescent current. figure 28. single-supply, very low power, ecg circuit 9 power supply recommendations the opa2333p is specified for operation from 1.8 v to 5.5 v ( 0.9 v to 2.75 v); many specifications apply from ? 40 c to 125 c. the typical characteristics presents parameters that can exhibit significant variance with regard to operating voltage or temperature. caution supply voltages larger than 7 v can permanently damage the device (see absolute maximum ratings ). ti recommends placing 0.1- f bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high-impedance power supplies. for more detailed information on bypass capacitor placement, refer to the layout section. r 1 100 k w 1/2 opa2333 ra inverted v cm +v s ina321 (1) +v s v out +v s +v s +v s opa333 +v s 1/2 v s dc 32 1 4 5 6 g = 1 kv/v tot g = 5 ina g = 200 opa f = 150 hz lpf f = 0.5 hz hpf (provides ac signal coupling) v = +2.7 v to +5.5 v s bw = 0.5 hz to 150 hz f = 0.5 hz o wilson v central (ra + la + ll) / 3 7 ac 1/2 v s r 2 100 k w 1/2 opa2333 ll +v s r 3 100 k w 1/2 opa2333 la r 4 100 k w r 9 20 k w r 6 100 k w rl +v s +v s 1/2 opa2333 1/2 opa2333 1/2 opa2333 c 4 1.06 nf c 3 1 f m r 14 1 m w r 12 5 k w r 13 318 k w r 7 100 k w r 8 100 k w r 10 1 m w c 2 0.64 f m r 11 1 m w c 1 47 pf r 5 390 k w
21 opa2333p www.ti.com sbos908 ? november 2017 product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated 10 layout 10.1 layout guidelines 10.1.1 general layout guidelines pay attention to good layout practices. keep traces short and when possible and use a printed-circuit-board (pcb) ground plane with surface-mount components placed as close to the device pins as possible. place a 0.1- f capacitor closely across the supply pins. apply these guidelines throughout the analog circuit to improve performance and provide benefits, such as reducing the electromagnetic interference (emi) susceptibility. operational amplifiers vary in susceptibility to radio frequency interference (rfi). rfi can generally be identified as a variation in offset voltage or dc signal levels with changes in the interfering rf signal. the opa2333p is specifically designed to minimize susceptibility to rfi and demonstrates remarkably low sensitivity compared to previous generation devices. strong rf fields may still cause varying offset levels. 10.1.2 dfn layout guidelines solder the exposed leadframe die pad on the dfn package to a thermal pad on the pcb. a mechanical drawing showing an example layout is attached at the end of this data sheet. refinements to this layout may be necessary based on assembly process requirements. mechanical drawings located at the end of this data sheet list the physical dimensions for the package and pad. the five holes in the landing pattern are optional, and are intended for use with thermal vias that connect the leadframe die pad to the heatsink area on the pcb. soldering the exposed pad significantly improves board-level reliability during temperature cycling, key push, package shear, and similar board-level tests. even with applications that have low-power dissipation, the exposed pad must be soldered to the pcb to provide structural integrity and long-term reliability. 10.2 layout example figure 29. layout example in a +in a v v+ vs+ vs vout a vin a run the input traces as far away from the supply lines as possible rf rg use low-esr, ceramic bypass capacitor copyright ? 2017, texas instruments incorporated use a low-esr, ceramic bypass capacitor out a out b in b +in b connect exposed pad to vs- vs rf rg place components close to device and to each other to reduce parasitic errors run the input traces as far away from the supply lines as possible place components close to device and to each other to reduce parasitic errors vout b vin b
22 opa2333p sbos908 ? november 2017 www.ti.com product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated 11 device and documentation support 11.1 device support 11.1.1 development support for development support on this product, see the following: ? high-side v-i converter, 0 v to 2 v to 0 ma to 100 ma, 1% full-scale error ? low-level v-to-i converter reference design, 0-v to 5-v input to 0- a to 5- a output ? ads8881x 118-bit, 1-msps, serial interface, micropower, miniature, true-differential input, sar analog-to- digital converter ? ths4281 very low-power, high-speed, rail-to-rail input and output voltage-feedback operational amplifier ? data acquisition optimized for lowest distortion, lowest noise, 18-bit, 1-msps reference design ? ads1100 self-calibrating, 16-bit analog-to-digital converter ? ref31xx 15ppm/ c maximum, 100- a, sot-23 series voltage reference ? ina326, ina327 precision, low drift, cmos instrumentation amplifier 11.2 documentation support 11.2.1 related documentation for related documentation, see the following: qfn/son pcb attachment 11.3 receiving notification of documentation updates to receive notification of documentation updates, navigate to the device product folder on ti.com. in the upper right corner, click on alert me to register and receive a weekly digest of any product information that has changed. for change details, review the revision history included in any revised document. 11.4 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 11.5 trademarks e2e is a trademark of texas instruments. all other trademarks are the property of their respective owners. 11.6 electrostatic discharge caution these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. 11.7 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions.
23 opa2333p www.ti.com sbos908 ? november 2017 product folder links: opa2333p submit documentation feedback copyright ? 2017, texas instruments incorporated 12 mechanical, packaging, and orderable information the following pages include mechanical, packaging, and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser-based versions of this data sheet, refer to the left-hand navigation.
package option addendum www.ti.com 3-nov-2017 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples OPA2333PIDSGR preview wson dsg 8 3000 tbd call ti call ti -40 to 125 opa2333pidsgt preview wson dsg 8 250 tbd call ti call ti -40 to 125 (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) rohs: ti defines "rohs" to mean semiconductor products that are compliant with the current eu rohs requirements for all 10 rohs substances, including the requirement that rohs substance do not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, "rohs" products are suitable for use in specified lead-free processes. ti may reference these types of products as "pb-free". rohs exempt: ti defines "rohs exempt" to mean products that contain lead but are compliant with eu rohs pursuant to a specific eu rohs exemption. green: ti defines "green" to mean the content of chlorine (cl) and bromine (br) based flame retardants meet js709b low halogen requirements of <=1000ppm threshold. antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.

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